1. Field of the Invention
The present invention relates to a semiconductor memory device having a security protection mechanism. In particular, the present invention relates to a security protection mechanism of an electrically rewritable nonvolatile semiconductor memory device.
2. Description of the Related Art
Recently, flash memories which are electrically rewritable of data and fully (or partly) erasable of data have been developed as core products of nonvolatile semiconductor memory devices. In particular, flash memories containing series of memory cells called NAND types (NAND type flash memories) find wide use as mass storage devices intended for file applications.
Generally, a NAND type flash memory has no address terminal or command terminal. Addresses, commands (executable instructions), and data are all input or output through input/output terminals. The addresses and commands supplied from exterior are stored into an address register and a command register, respectively. The write data supplied from exterior and the read data read from a memory core are temporarily stored in a page buffer (data register). The page buffer operates by having the memory regions in the page buffer selected by pointer values. The page buffer typically has the same memory capacity as that of a page (the unit by which data is read/written from/to the memory core) a plurality of which are formed in the memory core.
In a read operation of the NAND type flash memory described above, a command (read instruction) is supplied initially. The supplied command is stored in the command register. Next, the read start address of data is supplied in three. These addresses are stored in the address register.
Subsequently, the read operation is started and a page of data is transferred from the memory core to the page buffer. The data transferred to the page buffer is successively output through the input/output terminals in synchronization with a read enable signal (clock) which is supplied to a read enable terminal. More specifically, the value of the pointer is incremented by one in synchronization with the read enable signal, and the read data is output in succession from the memory regions selected by the pointer values.
In recent years, needs have been growing for the security protection of data stored in storage media intended for digital equipment (memory cards etc.) which use nonvolatile semiconductor memory devices including flash memories. For example, when personal information is stored in the storage media, the information must be prevented from easy read. Nevertheless, conventional flash memories and the like have no security protection mechanism, which gives rise to the problem that personal information and the like can be read easily. For example, flash memories output data whenever they receive read instructions from exterior.
Security protection mechanisms may be added to storage media that implement flash memories. Storage media, however, are desired to be compact and inexpensive. Accordingly, the addition of new circuits for security protection to the system substrates of the storage media has difficulties that the storage media become greater in outer dimensions and that they increase in cost.
Japanese Unexamined Patent Application Publication No. Hei 1-277370 discloses a technology for security protection of image information to be recorded on an image recording apparatus. This image recording apparatus records image information in the form of random data by changing the order of recording in accordance with a password input upon recording the image information. To read the image information, a password is input again. The image recording apparatus outputs the random data as-is if the passwords do not match with each other. If the passwords match, the image recording apparatus rearranges the random data according to the password and outputs the resultant as the original image information.
In this type of security protection technology, however, it has been necessary to manipulate the sequence of data both in writing and in reading the data. Moreover, at the time of writing, the sequence of image data must be changed to generate random data before the random data is written to a memory circuit. This increases the circuit scale of the write control circuit, and requires enormous amounts of write time.
An object of the present invention is to provide a semiconductor memory device which can realize security protection of data with simple control circuitry.
Another object of the present invention is to provide a semiconductor memory device which can realize security protection of data without much modification in architecture.
According to one of the aspects of the semiconductor memory device of the present invention, a page buffer holds read data read from a memory cell selected from among a plurality of memory cell blocks, and outputs the held data in order. That is, read data is read not directly from the memory cell blocks but through the page buffer. A password control circuit compares a read password supplied during a read operation with an original password stored in advance, and outputs the result of comparison. A buffer control circuit changes the order the read data is output from the page buffer when the result of comparison is a mismatch. In other words, the page buffer outputs the read data in predetermined order when the read password is correct, and outputs the read data in random order when the read password is incorrect. This realizes security protection of the data written in the semiconductor memory device. Since the security protection is exercised in read operations according to the read password, the control circuitry necessary for data write operations may be the same as in conventional art. The arrangement of the data written to the memory cell blocks is also the same as in conventional art. For this reason, the security protection of the data can be effected simply by modifying a part of the buffer control circuit and providing a new password control circuit. Consequently, the security protection mechanism can be added with a minimum increase in chip size.
Incidentally, when the read password is incorrect, read data is output although it is in random order. Therefore, those who try to read data illicitly cannot determine whether the output data is correct or not. This allows enhanced security protection as compared with the case of simply judging passwords.
According to another aspect of the semiconductor memory device of the present invention, the page buffer has a plurality of memory regions for holding the read data, respectively. The buffer control circuit includes a pointer control circuit. The pointer control circuit generates pointer values for selecting which of the memory regions to output the read data to. Then, the pointer control circuit puts the pointer values in proper order when the result of comparison of the passwords is a match, and puts the pointer values in random order when the result of comparison of the passwords is a mismatch. For example, when the result of comparison of the passwords is a mismatch, the pointer control circuit increments the pointer values by two or by three. Alternatively, the pointer control circuit stops updating the pointer values and outputs identical pointer values. As a result, the security protection of the data can be easily achieved by simply manipulating the pointer values according to the read password.
According to another aspect of the semiconductor memory device of the present invention, the semiconductor memory device comprises a pitch memory circuit for storing the pitch in the pointer values to be used when the result of comparison is a mismatch. Therefore, the pitch between the pointer values can be set freely by, for example, manufacturers of semiconductor memory devices or manufacturers of memory cards that implement semiconductor memory devices. Semiconductor memory devices having various pitches in the pointer values can be shipped for sure prevention of being read illicitly. According to another aspect of the semiconductor memory device of the present invention, a write inhibition circuit stores write information indicating that the pitch between the pointer values is written to the pitch memory circuit. When it contains the write information, the write inhibition circuit inhibits thereafter any write to the pitch memory circuit. Therefore, it is possible to prevent the pitches written by the manufacturers from being tampered.
According to another aspect of the semiconductor memory device of the present invention, the pitch memory circuit and the write inhibition circuit include electrically rewritable nonvolatile memory elements for storing the pitch and the write information, respectively. Therefore, even when power is not supplied to the semiconductor memory device, the pitch in the pointer values and the write information can be prevented from disappearing.
According to another aspect of the semiconductor memory device of the present invention, the password control circuit includes an original password memory part for storing the original password. The original password memory part is composed of an electrically rewritable nonvolatile memory element. Therefore, even when power is not supplied to the semiconductor memory device, the original password can be prevented from disappearing.
According to another aspect of the semiconductor memory device of the present invention, the semiconductor memory device is formed as a NAND type flash memory. A NAND type flash memory typically has a plurality of memory cell blocks (pages), a page buffer having a memory capacity corresponding to the memory capacity of a page, and a buffer control circuit for controlling the page buffer. Therefore, the NAND type flash memory having a security protection mechanism can be easily developed by simply modifying a part of the conventional circuits.